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interrupts on pic18f2550
22-05-2013, 12:23 AM,
#1
interrupts on pic18f2550
HEllo all

as i wandering on the web about interrupts on pic18f2550 i found that: http://www.xargs.com/pic/c-faq.html#c18isr, items 13 an 14.
Does these remarks apply to the sdcc compiler too (which i imagine the answer is yes, since it seems more hardware related than compiler )
Is there a way to disable the high and low priority and have only one priority level? (i found that removing the low priority section in main.c and renaming high_priority_isr to isr allow code compilation (a code with an interrupt handler) without issue, but i don't know if the code will work and if it make sense at all! (i have a need of a low latency for time "critical" application)

Joël
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22-05-2013, 02:17 PM,
#2
RE: interrupts on pic18f2550
The right solution should be to clear RCONbits.IPEN bit (in main.c) to disable priority levels on interrupts but you wouldn't get a more responsive system (read also below). On the other hand you will certainly get some troubles with some Pinguino libraries.
Another solution could be to move userinterrupt() from low_priority_isr to high_priority_isr interrupt. Bear in mind that priorities apply only when 2 interrupts occurs at the same time.

(22-05-2013, 12:23 AM)joel Wrote: HEllo all

as i wandering on the web about interrupts on pic18f2550 i found that: http://www.xargs.com/pic/c-faq.html#c18isr, items 13 an 14.
Does these remarks apply to the sdcc compiler too (which i imagine the answer is yes, since it seems more hardware related than compiler )
Is there a way to disable the high and low priority and have only one priority level? (i found that removing the low priority section in main.c and renaming high_priority_isr to isr allow code compilation (a code with an interrupt handler) without issue, but i don't know if the code will work and if it make sense at all! (i have a need of a low latency for time "critical" application)

Joël
It is easier to complain than it is to do, but it is better to do than it is to complain.
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